InGaZnO TFT behavioral model for IC design

TitleInGaZnO TFT behavioral model for IC design
Publication TypeJournal Article
Year of Publication2016
AuthorsBahubalindrun P a, Tavares V b, Barquinha P a, De Oliveira PG b, Martins R a, Fortunato E a
JournalAnalog Integrated Circuits and Signal Processing
Volume87
Pagination73-80
ISSN09251030
KeywordsAmorphous films, Amplifiers (electronic), Behavioral research, Capacitance, Circuit simulation, Common source amplifier, Electric power systems, Equivalent circuits, Field effect transistors, Indium, Integrated circuit design, Large signal behavior, Neural models, Neural networks, Reconfigurable hardware, Semiconducting indium compounds, Simulations and measurements, Static and dynamic behaviors, TFT circuits, Tft modeling, Thin film transistors, Verilog-A
Abstract

This paper presents a behavioral model for amorphous indium–gallium–zinc oxide thin-film transistor using artificial neural network (ANN) based equivalent circuit (EC) approach to predict static and dynamic behavior of the device. In addition, TFT parasitic capacitances (CGS and CGD) characterization through measurements is also reported. In the proposed model, an EC is derived from the device structure, in terms of electrical lumped elements. Each electrical element in the EC is modeled with an ANN. Then these ANNs are connected together as per the EC and implemented in Verilog-A. The proposed model performance is validated by comparing the circuit simulation results with the measured response of a simple common-source amplifier, which has shown 12.2 dB gain, 50 μW power consumption and 85 kHz 3-dB frequency with a power supply of 6 V. The same circuit is tested as an inverter and its response is also presented up to 50 kHz, from both simulations and measurements. These results show that the model is capable of capturing both small and large signal behavior of the device to good accuracy, even including the harmonic distortion of the signal (that emphasizes the nonlinear behavior of the parasitic capacitance), making the model suitable for IC design. © 2016, Springer Science+Business Media New York.

URLhttps://www.scopus.com/inward/record.uri?eid=2-s2.0-84961927991&doi=10.1007%2fs10470-016-0706-4&partnerID=40&md5=caa0b0ab7d2f3eb5cbb97666f92e8d3b
DOI10.1007/s10470-016-0706-4