<?xml version="1.0" encoding="UTF-8"?><xml><records><record><source-app name="Biblio" version="6.x">Drupal-Biblio</source-app><ref-type>17</ref-type><contributors><authors><author><style face="normal" font="default" size="100%">Bahubalindrun, P.a</style></author><author><style face="normal" font="default" size="100%">Tavares, V.b</style></author><author><style face="normal" font="default" size="100%">Barquinha, P.a</style></author><author><style face="normal" font="default" size="100%">De Oliveira, P.G.b</style></author><author><style face="normal" font="default" size="100%">Martins, R.a</style></author><author><style face="normal" font="default" size="100%">Fortunato, E.a</style></author></authors></contributors><titles><title><style face="normal" font="default" size="100%">InGaZnO TFT behavioral model for IC design</style></title><secondary-title><style face="normal" font="default" size="100%">Analog Integrated Circuits and Signal Processing</style></secondary-title></titles><keywords><keyword><style  face="normal" font="default" size="100%">Amorphous films</style></keyword><keyword><style  face="normal" font="default" size="100%">Amplifiers (electronic)</style></keyword><keyword><style  face="normal" font="default" size="100%">Behavioral research</style></keyword><keyword><style  face="normal" font="default" size="100%">Capacitance</style></keyword><keyword><style  face="normal" font="default" size="100%">Circuit simulation</style></keyword><keyword><style  face="normal" font="default" size="100%">Common source amplifier</style></keyword><keyword><style  face="normal" font="default" size="100%">Electric power systems</style></keyword><keyword><style  face="normal" font="default" size="100%">Equivalent circuits</style></keyword><keyword><style  face="normal" font="default" size="100%">Field effect transistors</style></keyword><keyword><style  face="normal" font="default" size="100%">Indium</style></keyword><keyword><style  face="normal" font="default" size="100%">Integrated circuit design</style></keyword><keyword><style  face="normal" font="default" size="100%">Large signal behavior</style></keyword><keyword><style  face="normal" font="default" size="100%">Neural models</style></keyword><keyword><style  face="normal" font="default" size="100%">Neural networks</style></keyword><keyword><style  face="normal" font="default" size="100%">Reconfigurable hardware</style></keyword><keyword><style  face="normal" font="default" size="100%">Semiconducting indium compounds</style></keyword><keyword><style  face="normal" font="default" size="100%">Simulations and measurements</style></keyword><keyword><style  face="normal" font="default" size="100%">Static and dynamic behaviors</style></keyword><keyword><style  face="normal" font="default" size="100%">TFT circuits</style></keyword><keyword><style  face="normal" font="default" size="100%">Tft modeling</style></keyword><keyword><style  face="normal" font="default" size="100%">Thin film transistors</style></keyword><keyword><style  face="normal" font="default" size="100%">Verilog-A</style></keyword></keywords><dates><year><style  face="normal" font="default" size="100%">2016</style></year></dates><urls><web-urls><url><style face="normal" font="default" size="100%">https://www.scopus.com/inward/record.uri?eid=2-s2.0-84961927991&amp;doi=10.1007%2fs10470-016-0706-4&amp;partnerID=40&amp;md5=caa0b0ab7d2f3eb5cbb97666f92e8d3b</style></url></web-urls></urls><number><style face="normal" font="default" size="100%">1</style></number><publisher><style face="normal" font="default" size="100%">Springer New York LLC</style></publisher><volume><style face="normal" font="default" size="100%">87</style></volume><pages><style face="normal" font="default" size="100%">73-80</style></pages><language><style face="normal" font="default" size="100%">eng</style></language><abstract><style face="normal" font="default" size="100%">This paper presents a behavioral model for amorphous indium–gallium–zinc oxide thin-film transistor using artificial neural network (ANN) based equivalent circuit (EC) approach to predict static and dynamic behavior of the device. In addition, TFT parasitic capacitances (CGS and CGD) characterization through measurements is also reported. In the proposed model, an EC is derived from the device structure, in terms of electrical lumped elements. Each electrical element in the EC is modeled with an ANN. Then these ANNs are connected together as per the EC and implemented in Verilog-A. The proposed model performance is validated by comparing the circuit simulation results with the measured response of a simple common-source amplifier, which has shown 12.2 dB gain, 50 μW power consumption and 85 kHz 3-dB frequency with a power supply of 6 V. The same circuit is tested as an inverter and its response is also presented up to 50 kHz, from both simulations and measurements. These results show that the model is capable of capturing both small and large signal behavior of the device to good accuracy, even including the harmonic distortion of the signal (that emphasizes the nonlinear behavior of the parasitic capacitance), making the model suitable for IC design. Â© 2016, Springer Science+Business Media New York.</style></abstract><notes><style face="normal" font="default" size="100%">cited By 0</style></notes></record></records></xml>