<?xml version="1.0" encoding="UTF-8"?><xml><records><record><source-app name="Biblio" version="6.x">Drupal-Biblio</source-app><ref-type>17</ref-type><contributors><authors><author><style face="normal" font="default" size="100%">Martins, J.a</style></author><author><style face="normal" font="default" size="100%">Barquinha, P.a</style></author><author><style face="normal" font="default" size="100%">Goes, J.b</style></author></authors><secondary-authors><author><style face="normal" font="default" size="100%">Camarinha-Matos L.M., Falcao A.J., Vafaei N., Najdi S.</style></author></secondary-authors></contributors><titles><title><style face="normal" font="default" size="100%">TCAD simulation of amorphous indium-gallium-zinc oxide thin-film transistors</style></title><secondary-title><style face="normal" font="default" size="100%">IFIP Advances in Information and Communication Technology</style></secondary-title></titles><keywords><keyword><style  face="normal" font="default" size="100%">Amorphous films</style></keyword><keyword><style  face="normal" font="default" size="100%">Amorphous semiconductors</style></keyword><keyword><style  face="normal" font="default" size="100%">Amorphous-indium gallium zinc oxides</style></keyword><keyword><style  face="normal" font="default" size="100%">DOS</style></keyword><keyword><style  face="normal" font="default" size="100%">Drain-induced barrier lowering</style></keyword><keyword><style  face="normal" font="default" size="100%">Electronic design automation</style></keyword><keyword><style  face="normal" font="default" size="100%">Embedded systems</style></keyword><keyword><style  face="normal" font="default" size="100%">Field effect transistors</style></keyword><keyword><style  face="normal" font="default" size="100%">Gallium</style></keyword><keyword><style  face="normal" font="default" size="100%">IGZO</style></keyword><keyword><style  face="normal" font="default" size="100%">Indium</style></keyword><keyword><style  face="normal" font="default" size="100%">Indium-gallium-zinc-oxide thin-film transistors (tfts) (IGZO)</style></keyword><keyword><style  face="normal" font="default" size="100%">MOS devices</style></keyword><keyword><style  face="normal" font="default" size="100%">Physical characteristics</style></keyword><keyword><style  face="normal" font="default" size="100%">Reconfigurable hardware</style></keyword><keyword><style  face="normal" font="default" size="100%">TCAD simulation</style></keyword><keyword><style  face="normal" font="default" size="100%">Thin film transistors</style></keyword><keyword><style  face="normal" font="default" size="100%">Thin films</style></keyword><keyword><style  face="normal" font="default" size="100%">Threshold voltage</style></keyword><keyword><style  face="normal" font="default" size="100%">Threshold voltage modulations</style></keyword><keyword><style  face="normal" font="default" size="100%">Transfer characteristics</style></keyword><keyword><style  face="normal" font="default" size="100%">Zinc</style></keyword><keyword><style  face="normal" font="default" size="100%">Zinc oxide</style></keyword></keywords><dates><year><style  face="normal" font="default" size="100%">2016</style></year></dates><urls><web-urls><url><style face="normal" font="default" size="100%">https://www.scopus.com/inward/record.uri?eid=2-s2.0-84962074297&amp;doi=10.1007%2f978-3-319-31165-4_52&amp;partnerID=40&amp;md5=0f012d56a09636714762e7bddc928ccb</style></url></web-urls></urls><publisher><style face="normal" font="default" size="100%">Springer New York LLC</style></publisher><volume><style face="normal" font="default" size="100%">470</style></volume><pages><style face="normal" font="default" size="100%">551-557</style></pages><isbn><style face="normal" font="default" size="100%">9783319311647</style></isbn><language><style face="normal" font="default" size="100%">eng</style></language><abstract><style face="normal" font="default" size="100%">Indium-gallium-zinc oxide (IGZO) thin-film transistors (TFTs) are simulated using TCAD software. Nonlinearities observed in fabricated devices are obtained through simulation and corresponding physical characteristics are further investigated. For small channel length (below 1 μm) TFTs’ simulations show short channel effects, namely drain-induced barrier lowering (DIBL), and effectively source-channel barrier is shown to decrease with drain bias. Simulations with increasing shallow donor-like states result in transfer characteristics presenting hump-like behavior as typically observed after gate bias stress. Additionally, dual-gate architecture is simulated, exhibiting threshold voltage modulation by the second gate biasing. © IFIP International Federation for Information Processing 2016.</style></abstract><notes><style face="normal" font="default" size="100%">cited By 0; Conference of 7th IFIP WG 5.5/SOCOLNET Advanced Doctoral Conference on Computing, Electrical and Industrial Systems, DoCEIS 2016 ; Conference Date: 11 April 2016 Through 13 April 2016; Conference Code:172549</style></notes></record></records></xml>