@article {Kiazadeh2016, title = {Improving positive and negative bias illumination stress stability in parylene passivated IGZO transistors}, journal = {Applied Physics Letters}, volume = {109}, number = {5}, year = {2016}, note = {cited By 0}, publisher = {American Institute of Physics Inc.}, abstract = {The impact of a parylene top-coating layer on the illumination and bias stress instabilities of indium-gallium-zinc oxide thin-film transistors (TFTs) is presented and discussed. The parylene coating substantially reduces the threshold voltage shift caused by continuous application of a gate bias and light exposure. The operational stability improves by 75\%, and the light induced instability is reduced by 35\%. The operational stability is quantified by fitting the threshold voltage shift with a stretched exponential model. Storage time as long as 7 months does not cause any measurable degradation on the electrical performance. It is proposed that parylene plays not only the role of an encapsulation layer but also of a defect passivation on the top semiconductor surface. It is also reported that depletion-mode TFTs are less sensitive to light induced instabilities. This is attributed to a defect neutralization process in the presence of free electrons. {\textcopyright} 2016 Author(s).}, keywords = {Bias voltage, Coatings, Electrical performance, Encapsulation layer, Indium, Indium gallium zinc oxides, Neutralization process, Operational stability, Passivation, Semi-conductor surfaces, Stability, Stretched exponential models, Surface defects, Thin film transistors, Threshold voltage, Threshold voltage shifts, Transistors, Zinc coatings}, issn = {00036951}, doi = {10.1063/1.4960200}, url = {https://www.scopus.com/inward/record.uri?eid=2-s2.0-84981155175\&doi=10.1063\%2f1.4960200\&partnerID=40\&md5=d3f5245134d17c2b45d10c6623cb25ef}, author = {Kiazadeh, A.a b and Gomes, H.L.b c and Barquinha, P.a and Martins, J.a and Rovisco, A.a and Pinto, J.V.a and Martins, R.a and Fortunato, E.a} }